The present invention relates to data processing systems, and more particularly to condition code accumulator apparatus used therein.
In the serial processing of data processing system instructions, it is often necessary to detect certain characteristics of operands, on a per-unit basis and retain a record of the result of inspecting the entire operand for a given characteristic. Typically, it is necessary to know if at least one instance of such certain characteristic has occurred. The logic of this requirement demands the ability to test for a given condition and to retain a record of a detection of the condition unaltered by the result of subsequent tests which may or may not be successful. A further requirement is that the condition under test be sampled only at certain times during the operational cycles of the data processing system. A method of the prior art for implementing such condition code accumulator is to feedback the output of a register into an OR gate with the other input being the condition under test, and clocking the output of such OR gate to set the register. Such prior art apparatus requires two clock pulses to insure that the recording register does not sense while in an unstable state. This technique of the prior art, besides requiring two separate clock pulses, further requires associated logic for insuring the correct accumulation of such conditions.
It is accordingly a primary object of the present invention to provide an improved condition code accumulator for use in a data processing system.